 Leonardo Spectrum
Leonardo Spectrum Platform-Independent FPGA/ASIC Synthesis ȯμ
Synthesis Tool ߴ ȯ մϴ.
, ܼ RTL ϰų Place and Route tool Synthesis ϴ ʽϴ.
Leonardo Spectrum 迡 Design Creation, Simulation, Synthesis,
Implementation Technology ϰ Ͽ
FPGA ASIC ȯ մϴ.
- Push-button ease-of-use for designing PLDs, FPGAs and ASICs, in VHDL or
Verilog
- HDLInventor creates optimized HDL code fast and facilitates company-wide
sharing of IP
- P&R Integrator simplifies place-and-route and delivers improved results
- Opens access to advanced synthesis controls within PowerTabs
- Proprietary ease-of-use features such as FlowTabs and QuickSetup ease
first-time FPGA synthesis
- Offers true hierarchical support for incremental synthesis
- Schematic Fragment Generator gives quick insight into a designs
behavior
Benefits
- One tool, one easy learning curve, one set of scripts -- for CPLDs, FPGAs,
or ASICsUsers can mix VHDL, Verilog and EDIF, enabling design reuse and
instantiation of IP
- Provides high QoR with the speed and features needed for large designs
- Built-in partitioning speeds ASIC prototyping and verification process
- True hierarchical support makes it easy to group and ungroup design
elements, which can then be targeted for single or multiple chips
- Offers users language neutrality, and both platform- and target device
independence
- Exclusive five-way cross-probing among multiple design views in
LeonardoInsight accelerates synthesis analysis
- Schematic Fragment Generator optimizes area and performance
tradeoffs
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