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Active-HDL°ú CoVer´Â FPGA Co-Verification platformÀ» Á¦°ø Çϰí ÀÖ½À´Ï´Ù. ÀÌ´Â ÇϳªÀÇ ÇÁ·ÎÁ§Æ®¿¡¼­ Çϵå¿þ¾î ¿£Áö´Ï¾î¿Í ¼ÒÇÁÆ®¿þ¾î °³¹ßÀÚ°¡ µ¿½Ã¿¡ ÀÛ¾÷ ÇÒ¼ö ÀÖ¾î È¿°úÀûÀ¸·Î µðÀÚÀÎ ¼³°è°¡ °¡´É ÇØÁö¸ç, ´Ü½Ã°£³»¿¡ Á¦Ç°À» °³¹ß ÇÒ¼ö ÀÖµµ·Ï µµ¿Í ÁÝ´Ï´Ù.
CoVer´Â µ¿ÀÏÇÑ µðÀÚÀÎ °æ¿ì ¼ÒÇÁÆ®¿þ¾î¿Í Çϵå¿þ¾î¸¦ µ¿½Ã¿¡ ÀÛ¾÷ ÇÒ¼ö ÀÖÀ¸¸ç, ¼ÒÇÁÆ®¿þ¾î ÇÁ·Î±×·¥Àº Çϵå¿þ¾î ÇÁ·Î¼¼¼­ ½ºÇǵå·Î ½ÇÇà µË´Ï´Ù.

 

Product Overview
 
bullet Embedded Systems for Dummies(.ppt)
bullet Benefits to Hardware Engineers 
bullet Benefits to Software Developers
bullet Benefits to the System Engineer
bullet General Data Sheet(.pdf)
bullet System Benchmarks
 

 

Technical Specifications
 
bullet Altera¢ç Nios¢ç Data Sheet (10/2003)
bullet Xilinx¢ç Microblaze¢ç Data Sheet (.pdf)
bullet FAQ

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