Concept Engineering

EDA

9월 192012

Netlist Visualization and Debugging Solution for Gate, SPICE, RTL

회사개요

1990년 6월에 설립된 Concept Engineering 사는 독일 Freiburg 에 본사를 두고 있으며, 회로도 생성 및 시각화를 전문으로 하는 GUI 툴의 엔진을 개발하였습니다. 이 엔진은 EDA 유수업체인 Magma, Atrenta, Jedat, DAFCA, HeedSoft, ProDesign, OASIS, Altos 등의 회사에서 OEM으로 채택되어 각 사의 회로도 확인 툴로도 함께 제공하고 있습니다. 또한 자체의 응용 제품들을 개발하여 전 세계 시장에 영업 및 지원을 함께하고 있습니다.

제품개요

FPGA, ASIC 반도체 및 SoC 설계 시에 개발되는 디자인의 종류로는 RTL, Gate-level Netlist, SPICE Netlist 등이 대표적인데 Concept Engineering 사에서는 이 디자인 데이터에 대하여 빠른 회로도 생성과 시각화를 도와 주고 디버깅을 할 수 있도록 제공합니다. 또한, 코아 엔진인 T-Engine 과, NLview 등을 OEM으로 판매 및 지원하고 있고, 응용제품인 GateVision, SPICEVision STARVision 등의 다양한 툴들을 개발하여 회로도 자동 생성 분야에서는 최고의 기술력과 안정된 제품을 자랑하고 있다.

제품소개 및 혜택

RTLVISION pro

Features	Benefits
Ultra fast HDL reader and graphics on the fly	Graphical representations make it easier to understand, debug, change and implement RTL code
Interactive Graphic Fragment Navigation shows only critical fragments of the RTL	Being able to identify and concentrate on a fragment helps to reduce complexity of the debug process and makes it easier to understand and change RTL code
Automatic clock trees and clock domains extraction and analysis	Faster detection and resolution of clock domain problems
Full support for mixed language designs (SystemVerilog, Verilog, VHDL)	Designers can easily develop and debug today’s most complex heterogeneous designs
Incremental design compilation	Design updates can be faster, with only changed areas re-compiled
Automated design documentation	New and re-used code can be documented automatically
Tcl API	RTLvision PRO can be interfaced with the tool flow and the user can extend functionality to match project needs

GATEVISION pro

Features	Benefits
32/64bit platform and on-the-fly schematic creation	produces very high speed and capacity
UserWare API	Easily add custom capabilities for increased productivity
Automatic path extraction	Automatically extracts logic cones from user-defined reference points, and shows onl the relevant portion of the circuit, Reduces complexity in the design for improved and faster debug
Verilog and EDIF netlist interface	Easily plugs into almost any design flow
Search-and-show capability	Easy location of specific objects shortens debug time
Design hierarchy browser	Provides easy navigation through the design hierarchy and gives compact hierarchy overview
Object cross-probing	Highlights selected objects in all design views (schematic, logic cone and HDL view) and shortens debug time
Context-sensitive menus	Easy-to-use GUI

SPICEVISION pro

Features	Benefits
Creates schematics from Spice files	Schematics provide easier and faster debugging for complex circuits. Supported dialects include SPICE2, SPICE3, HSPICE, Calibre, CDL, Eldo and PSPICE
64-bit support (Solaris, AIX, AMD64 Linux, Itanium Linux).	Higher performance and increased capacity, for larger and more complex designs
Powerful GUI	Multiple views, including tree, schematic, cone and source file for increased circuit understanding plus drag and drop between different views
Cone Window	Incremental schematic navigation for big designs
Non-Parasitic view	Displays CMOS function without parasitic structures for comprehension of circuit
Tcl UserWare API	Allows interfacing with tool flow and user customization
Fragment save	Fragments of circuits can be saved as Spice file and schematic for future reuse as IP, or for partial simulation
Schematic export	Export schematics and schematic fragments into Cadence Virtuoso Schematic Editor and EDIF 2.0.0 schematic files for further optimization and debugging
Predefined symbols	Symbols for components (resistors, capacitors, transistors, current and voltage sources etc) supplied as standard; can link to external symbol libraries

SGVISION pro

Features	Benefits
Support for Verilog and SPICE dialects in a single tool	Engineers can quickly and easily understand and debug mixed-mode designs
Interactive graphic fragment navigation	Reduces debug complexity and increases engineering productivity
Object cross-probing	By highlighting objects in all design views (schematic, logic cone and source code), helps shorten design and debug time
Tcl UserWare API	Allows user customization and interfacing to the design tool flow
32/64 bit platform support	Power to cope with the largest mixed-mode SoCs and ASICs
Non-Parasitic view	Displays CMOS function without parasitic structures for comprehension of circuit
Predefined symbols	Standard symbols for transistors, resistors capacitors etc, supplied. Can link to external symbol library to meet local conventions
Fragment save	Fragments of circuits can be saved as Spice file and schematic for future reuse as IP, or for partial simulation

NLVIEW WIDGETS

Features	Benefits
Simple and robust API	Ensures easy integration and reliable applications
Production-proven software components	Performance and quality of application is very high
Highly customizable component	Widget and application fit together
Tcl/Tk, Java, MFC, Qt and Perl/Tk components	Easily fits into your existing software development flow
Proprietary algorithms	Result in easy-to-read schematics and short response times
On-the-fly schematic creation	Results in very high speed and capacity
Bi-directional communication between widget and application	Allows interaction with the application (e.g. cross-probing, highlighting, attribute display, ballooning)
Incremental schematic viewing	Allows interactive modification of schematic fragments
Windows and LINUX platform support	Application will work on most hardware platforms
Built-in RTL and gate-level symbols	Application works without symbol libraries
Symbol translation tools	Provide access to existing symbol libraries

T-ENGINE

Features	Benefits
Simple and robust API	Ensures easy integration and reliable applications
Production-proven software components	Performance and quality of application is very high
Highly customizable component	Widget and application fit together
Tcl/Tk, Java, MFC and ActiveX components	Easily fits into your existing software development flow
Proprietary algorithms	Result in easy-to-read schematics and short response times
On-the-fly schematic creation	Results in very high speed and capacity
Bi-directional communication between widget and application	Allows interaction with the application (e.g. cross-probing, highlighting, attribute display, ballooning)
Incremental schematic viewing	Allows interactive modification of schematic fragments
Windows and LINUX platform support	Application will work on most hardware platforms
Built-in transistor and device-level symbols	Application works without symbol libraries
Symbol translation tools	Provide access to existing symbol libraries

홈페이지

http://www.concept.de